Saturday, March 30, 2013

Voltage Dividers Lab

In this lab exercise, we were asked to determine the range of source voltages that would guarantee a bus voltage in the range of 5.75 ≤  V ≤ 6.25 given that one to three loads in parallel were to be used with resistances of 1kΩ. This lab would reinforce the concepts of Thevenin equivalents and the voltage divider rule.

Our first step was to perform some design calculations. We were asked to compute the maximum and minimum  equivalent resistances of the one to loads in parallel. A single load would produce a higher equivalent resistance, since multiple loads in parallel produces an equivalent resistance that is smaller than the smallest load in parallel. Thus, we easily determined that the maximum equivalent resistance must be 1kΩ for a single load and and that the minimum equivalent resistance must be 333.333 ohms for three loads in parallel. Since voltage in general is proportional to resistance, we determined that the maximum bus voltage must be associated with the maximum equivalent resistance and that the minimum bus voltage must be associated with the minimum equivalent resistance. Through a formula given by our instruction on the whiteboard in front of class, we were asked to set up a system of equations that would allow to compute the required values of the of the source voltage and resistances. So Vs and Rs were found to have values of 6.53 V and 45.45 ohms, respectively. Through these values, we were able to compute the values of the maximum and minimum bus currents, which were found to be 17.25 mA and 6.25mA, respectively.

After these computations were established, we asked to take out the materials that we needed to perform the experiment. The loads were to be modeled using mounted resistors. A variable resistance box was to be used to model the source resistance. And finally, the voltage source used in this circuit was to be a bench top power supply. Short cables were to be used for the switches as open or short circuits.  Next, we were asked to place an ammeter in series with the source resistance and a voltmeter in parallel with the loads to measure current through and the voltage across the power supply. As usual, we were asked to measure each resistor with a multimeter and to compare their rated nominal resistances to their measured resistances. The nominal resistances, of course, were determined by their color codes.  As required, each resistor had a nominal value of 1kΩ. The measured resistances turned out to be 982 ohms, 978 ohms, and 988 ohms, which were all considered to be close enough values to 1kΩ. Next, we were to set the variable resistance box Rs as close 45.45 ohms as possible, since that was the value that we measured earlier. We calibrated it to 47.2 ohms. Likewise, we set the power supply voltage Vs, to 6.53 V, which again, was the value that we had measured earlier. It was calibrated exactly to a voltage of 6.53 V. The maximum bus current was found to be within the capability of the power supply. The maximum current was also found to be within the power capability of the resistor box.
The next step was to set up the breadboard. We were given a set of guidlines regarding how to set up the breadboard. We made sure that the power supply was de-energized until we were ready to perform the experiment.


We were now prepared to run the experiment. We had to collect the following data for the three loads: equivalent resistance (Req), bus voltage (Vbus), bus current (Ibus), and the calculated power delivered to the load. Load 1 had an equivalent resistance of 979 ohms, bus voltage of 5.49 volts, a bus current of 5.65mA, and a calculated power of 31.2 mW. Load 2 had an equivalent resistance of 489 ohms, a bus voltage of 4.75 V, a bus current of 9.80 mA, and a calculated power of 47.0 mW. Load 3 had an equivalent resistance of 326 ohms, a bus voltage of 4.25 V, a bus current of 13.19 mA, and a calculated power of 56.7 mW.

Now it was time to calculate to data and analysis questions. As mentioned in the previous paragraph, we had to compute the power delivered to each load, so please refer to the previous paragraph for that information. We computed voltage variations of 9.8%, -5.00%, and -15.0% for Loads 1, 2 , and 3, respectively. We predicted the adding a fourth load would cause a decrease in voltage variation. We also predicted that we would have to use smaller resistances and an increase in current in order to reduce the voltage variation.

The lab was now over and we were asked to disassemble the circuit. This was an interesting lab assignment and it provided us with another opportunity for us to get comfortable with creating circuits using a breadboard. It also helped us reinforced the concept of the voltage divider rule.

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